1. Field
Exemplary embodiments of the present invention relate to a semiconductor device, and more particularly, to a semiconductor device having a tungsten gate electrode and a method for fabricating the same.
2. Description of the Related Art
The requirements of next-generation CMOS circuits include low voltage, low power, high performance, high density and high reliability, which are achieved by the scaling of CMOS circuits. Scaling of the thickness of a gate insulating film results in various problems, including direct tunneling, impurity diffusion from a gate electrode, deterioration in the operating characteristics, reliability and lifetime of a gate, and so on. To achieve high capacitance, the thickness of the gate insulating film should be reduced, but in this case, leakage current increases to cause problems associated with the operating characteristics and reliability of the gate.
A physical limit to the thickness of the gate insulating film necessitates the introduction of new materials having high dielectric (high-k) characteristics. A high-k gate insulating film to which a large thickness can be physically applied can substitute for a silicon oxide film and can significantly reduce leakage current to improve the operating characteristics and reliability of the gate. The high-k gate insulating film should have a dielectric constant value higher than a silicon oxide film, thermodynamic stability in high-temperature thermal processes, and an amorphous phase.
When the high-k gate insulating film is introduced, it is difficult to use an N-type polysilicon film and a P-type polysilicon film as gate electrodes. This is because depletion is caused by impurity tunneling between an impurity-doped polysilicon film and a channel, and thus current decreases and charge trapping in an interfacial charge layer increases, resulting in an unstable increase in threshold voltage.
Thus, when a metal film is used as a gate electrode, additional impurity doping can be eliminated to reduce the number of processes, the gate depletion problem can be solved, and high-speed operation becomes possible by the introduction of a metal film having a very low resistance.
However, when a metal having a mid-gap work function is applied to both PMOS and NMOS, a very high threshold voltage should be applied to turn on each transistor, and thus the requirements of a low-voltage, high-efficiency device are not satisfied. Thus, in order to maintain the threshold voltage of a transistor at a low level to make the high-speed operation thereof possible, a double metal gate electrode structure is necessarily required.